1. Technical Field
The present invention relates to semiconductor devices, and, more particularly, to through-vias for semiconductor devices and methods of their fabrication.
2. Description of the Related Art
Certain wiring techniques in semiconductor devices, especially back-end of line (BEOL) wiring techniques, fabricate wiring layers by depositing a soft, low-k dielectric material on a semiconductor substrate, patterning channels or voids in the dielectric material and then depositing conductive material within the channels to form wires in the device. For convenience purposes, one common method forms through-vias in the device after some of the wiring has already been fabricated. For example, manufacturing setups and operations typically are configured to form finer structures near the bottom wiring layers and comparatively coarser structures near the top wiring layers. Thus, because through-vias are relatively coarse structures, manufacturing can be facilitated by forming the through-vias simultaneously with other coarse structures for the upper regions of the wiring layer.